Core.H.1
250MHz Cortex-M33
The Core.H.1 is built around the high-performance STM32H523 250-MHz 32-bit Cortex-M33 processor into a single T44 tile, providing a user-configurable combination of multiple communication interfaces (USB 2.0 full-speed, I2C/I3C, SPI, FDCAN, and UART), along with two 12-bit 5-Msps ADC inputs, one DAC output, and multiple timers.
Product Info
- Status
- Beta
- In Stock
- 2
- Pricing
Qty Each 1+ $17.50 10+ $15.75 50+ $14.88
Technical Summary
Resources & Links
- Datasheet
- Download PDF
- JSON Tile Definition
- v0.26 (Feb 15, 2026)
- Drivers
- GitHub
- Discussion
- Discord
Application Notes
USB 2.0 Full-Speed Port
To utilize the USB 2.0 Full-Speed (12Mbit/s) port, the supply voltage needs to be at least 3.0V. The Core.H.1 can serve as either a peripheral or a host.
USB Bootloading
Similar to the Core.U tiles, when the chip is blank, it will default into the bootloader when connected over USB. Once there is code in the program space, you need to hold the BOOT0 pin low during reset (either power-on or via the NRST pin) to enter the bootloader.
Single-Wire Debug & Bootloading
The single-wire debug port is available on pads 13 (SWCLK) and 14 (SWDIO). While not absolutely required, it is often helpful to have the ability to hold pad 12 (NRST) low when connecting to the debugger. You can likely also use BOOT0 to help the debugger connect.
LED
The onboard LED is connected to PA15 in an active-high configuration.
Pad Assignments
| Pad | ⏻ | D | A | USB | I2C | I3C | SPI | UART | FD CAN | ○ | ||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | GND | · | · | · | · | · | · | · | · | · | · | · |
| 2 | · | B4 | · | · | 3.DAT | 2.DAT | 1.MISO | · | · | 3.1, LP1.2 | · | · |
| 3 | · | A8 | · | SOF | 3.CLK | 2.CLK | 1.RDY | · | · | 1.1, 8.BKIN2 | · | · |
| 4 | · | B8 | · | · | 1.CLK | 1.CLK | · | 4.RX | FDCAN1.RX | 4.3 | · | · |
| 5 | · | B7 | · | · | 1.DAT | 1.DAT | · | · | FDCAN1.TX | 4.2 | · | · |
| 6 | · | A12 | · | DP | · | · | · | 4.TX | FDCAN1.TX | 1.ETR | · | · |
| 7 | · | A11 | · | DM | · | · | · | 4.RX | FDCAN1.RX | 1.4 | · | · |
| 8 | · | A7 | 7+, 3- | · | · | · | 1.MOSI | · | · | 1.1N, 3.2, 8.1N | · | · |
| 9 | · | A5 | 19+, 18- | · | · | · | 1.SCK | · | · | 2.1, 8.1N, 2.ETR | · | DAC1.OUT |
| 10 | V+ | · | · | · | · | · | · | · | · | · | · | · |
| 11 | · | · | · | · | · | · | · | · | · | · | BOOT0 | · |
| 12 | · | · | · | · | · | · | · | · | · | · | NRST | · |
| 13 | · | A14 | · | · | · | · | · | · | · | · | SWCLK | · |
| 14 | · | A13 | · | · | · | · | · | · | · | · | SWDIO | · |
USB
USB- Mode
- Max Clock
- —
- Address
- —
- Format
- —
| Function | Required | Pad(s) |
|---|---|---|
| USB.DP | Yes | 6 |
| USB.DM | Yes | 7 |
| USB.SOF | No | 3 |
I2C1
I2C- Mode
- master, slave
- Max Clock
- —
- Address
- programmable
- Format
- —
| Function | Required | Pad(s) |
|---|---|---|
| I2C1.CLK | Yes | 4 |
| I2C1.DAT | Yes | 5 |
I2C3
I2C- Mode
- master, slave
- Max Clock
- —
- Address
- programmable
- Format
- —
| Function | Required | Pad(s) |
|---|---|---|
| I2C3.DAT | Yes | 2 |
| I2C3.CLK | Yes | 3 |
I3C2
I3C- Mode
- master, slave
- Max Clock
- —
- Address
- —
- Format
- —
| Function | Required | Pad(s) |
|---|---|---|
| I3C2.DAT | Yes | 2 |
| I3C2.CLK | Yes | 3 |
I3C1
I3C- Mode
- master, slave
- Max Clock
- —
- Address
- —
- Format
- -bit address
| Function | Required | Pad(s) |
|---|---|---|
| I3C1.CLK | Yes | 4 |
| I3C1.DAT | Yes | 5 |
SPI1
SPI- Mode
- master
- Max Clock
- 45MHz
- Address
- —
- Format
- —
| Function | Required | Pad(s) |
|---|---|---|
| SPI1.MISO | Yes | 2 |
| SPI1.MOSI | Yes | 8 |
| SPI1.CLK | Yes | 9 |
| SPI1.RDY | No | 3 |
UART4
UART- Mode
- Max Clock
- —
- Address
- —
- Format
- —
| Function | Required | Pad(s) |
|---|---|---|
| UART4.RX | No | 4, 7 |
| UART4.TX | No | 6 |
FDCAN1
FD CAN- Mode
- Max Clock
- —
- Address
- —
- Format
- —
| Function | Required | Pad(s) |
|---|---|---|
| FDCAN1.RX | No | 4, 7 |
| FDCAN1.TX | No | 5, 6 |
Development Product — This is an electronic development module intended for evaluation, prototyping, and integration into other designs by qualified engineers and developers. It is not a finished consumer product and has not been independently certified for FCC, CE, UL, or other regulatory compliance. The integrator of this module into a finished product is responsible for obtaining all necessary certifications. Not intended for use in life-support systems, safety-critical applications, or any application where failure could result in personal injury or property damage. See our Terms of Sale for full details.