Power
Battery life is about being asleep most of the time. core_power exposes the three low-power modes and the ways to wake from them — a timed RTC interval, a pin edge — plus backup registers that survive the deepest sleep. It sits on ll_pwr (there’s no HAL layer). Use the Core / HAL / LL toggle at the top of the sidebar to switch.
Overview
The modes trade wakeup latency and retained state against current draw. Picking one is mostly about what you need alive while asleep and how you’ll wake:
- Sleep — CPU halted, peripherals and clocks running. Wakes on any interrupt, ~instantly. The everyday idle.
- Stop — clocks halted, RAM retained. Wakes from EXTI or the RTC; the clock tree is rebuilt on wake.
- Standby — almost everything off; RAM is lost and wakeup is a full reset. Lowest draw.
Sleep, stop & standby
The Core calls bundle entry, wakeup configuration, and (for stop) clock recovery into one call. core_sleep returns on the next interrupt; core_stop_for wakes itself after N seconds:
#include "core.h"
core_sleep(); // idle until any interrupt
core_stop_for(3); // Stop for 3 s (RTC), then resume with clocks restored
core_standby_for(60); // Standby 60 s — wakes via full reset (never returns)core_standby_* never returns — the MCU resets. Detect it at the top of main() with core_woke_from_standby().Wakeup & the RTC
Beyond a timed interval, you can wake on a pin edge, and the RTC gives you a wall clock with periodic wakeups and a calendar alarm:
// Wake from Stop on a falling edge on pad 8:
core_stop_until_on_change(8, EDGE_FALLING);
// RTC wall clock + alarm:
core_rtc_init();
core_rtc_set_time(12, 0, 0);
core_rtc_set_alarm(0xFF, 0xFF, 0); // 0xFF = wildcard → fire every minute at :00
if (core_rtc_alarm_fired()) { ... }Check core_woke_from_standby() first thing in main() to branch on a Standby return, then core_clear_standby_flag() to acknowledge it.
Backup registers
Backup registers are 32-bit slots that survive reset and Standby (and power loss, with VBAT). Use them for crash counters, boot flags, or carrying state across a Standby cycle:
core_backup_write(0, 0x12345678);
uint32_t saved = core_backup_read(0); // persists across reset / StandbyCORE_BACKUP_COUNT is 32 on most Cores, 5 on the M0+ (Core.ST.L0).Cross-architecture support
Sleep is verified across the family; Stop and Standby are further along on some Cores than others (Stop is hardware-verified on L4 and H5, compile-only elsewhere). RTC and backup registers are broadly available:
See the implementation status for the full matrix.
API reference
Power modes
void core_sleep(void);void core_stop_for(uint32_t seconds);int core_woke_from_standby(void);void core_stop_until_on_change(uint8_t pad, uint32_t edge);void core_standby_for(void);void core_standby_until_on_change(uint8_t pad, uint32_t edge);void core_stop(void);void core_standby(void);void core_clear_standby_flag(void);void core_watchdog_start_seconds(uint32_t seconds);Generated from core_power.h — tiles@2a1a847.
RTC
void core_rtc_init(void);void core_rtc_set_time(uint8_t h, uint8_t m, uint8_t s);void core_rtc_set_date(uint8_t y, uint8_t mo, uint8_t d, uint8_t wd);void core_rtc_wakeup(uint32_t seconds);void core_rtc_wakeup_stop(void);void core_rtc_set_alarm(uint8_t hours, uint8_t minutes, uint8_t seconds);void core_rtc_clear_alarm(void);int core_rtc_alarm_fired(void);void core_rtc_get_time(uint8_t * h, uint8_t * m, uint8_t * s);void core_rtc_get_date(uint8_t * y, uint8_t * mo, uint8_t * d, uint8_t * wd);Generated from core_rtc.h — tiles@6bbf0d8.
Backup registers
uint32_t core_backup_read(uint8_t index);void core_backup_write(uint8_t index, uint32_t value);void _core_backup_ensure_clk(void);Generated from core_backup.h — tiles@2a1a847.

